Prof. Pallav Gupta at Villanova

Research Software PDF Print E-mail

I have developed and/or co-developed the following academic research EDA software in conjunction with my research. All of these tools are publicly available and can be downloaded at Princeton's CAD homepage or at NanoHub.

TELS
ThrEshold Logic Synthesizer is a multi-level logic synthesis tool for threshold circuits based on nanotechnologies like resonant tunneling diodes, quantum cellular automata, single electron transistors and tunneling phase logic. TELS is integrated within SIS - a logic synthesis tool from UC Berkeley.

MALS
Majority Logic Synthesizer is a multi-level logic synthesis tool for majority circuits based on nanotechnologies like quantum cellular automata and single electron transistors. MALS is integrated within SIS.

RMRLS
Reed-Muller Reversible Logic Synthesizer is a tool for reversible logic synthesis that has applicability in reversible logic, low-power design, and quantum computing.. Currently, it is the only publicly available research tool and pushes the state-of-the-art in algorithms known for reversible logic synthesis.

If you have any questions about these tools, do not hesitate to contact me or This e-mail address is being protected from spambots. You need JavaScript enabled to view it .


The following tools/scripts might help make your life a little simpler.
  1. BibTeX Generator - A simple interactive script to generate BibTeX Files.