- P. Gupta, N. K. Jha, and L. Lingappan, "Test Generation for Combinational Quantum Cellular Automata (QCA) Circuits," in Proc. Design Automation & Test in Europe Conf., Mar. 2006, pp. 311-316, (27% acceptance rate).
- P. Gupta, S. Ravi, A. Raghunathan, and N. K. Jha, "Efficient Fingerprint-based User Authentication for Embedded Systems," in Proc. Design Automation Conf., June 2005, pp. 244-247, (21% acceptance rate).
- R. Zhang, P. Gupta, and N. K. Jha, "Synthesis of Majority and Minority Networks and its Applications to QCA, TPL, and SET based Nanotechnologies," in Proc. Int. Conf. VLSI Design, Jan. 2005, pp. 229-234, (30% acceptance rate).
- P. Gupta, R. Zhang, and N. K. Jha, "An Automatic Test Pattern Generation Framework for Combinational Threshold Logic Networks," in Proc. Int. Conf. Computer Design, Oct. 2004, pp. 540-543, (37% acceptance rate).
- R. Zhang, P. Gupta, L. Zhong, and N. K. Jha, "Synthesis and Optimization of Threshold Logic Networks with Application to Nanotechnologies," in Proc. Design Automation & Test in Europe Conf., Feb. 2004, pp. 904-909, (27% acceptance rate).
- P. Gupta and N. K. Jha, "An Algorithm for Nano-pipelining of Circuits and Architectures for a Nanotechnology," in Proc. Design Automation & Test in Europe Conf., Feb. 2004, pp. 974-979, (27% acceptance rate).
- P. Gupta, L. Zhong, and N. K. Jha, "A High-level Interconnect Power Model for Design Space Exploration," in Proc. Int. Conf. Computer-Aided Design, Nov. 2003, pp. 551-558, (26% acceptance rate).
- P. Gupta, S. J. Cunning, and J. W. Rozenblit, "Synthesis of High-level Requirements Model for Automatic Test Generation," in Proc. Int. Conf. Engineering of Computer Based Systems, Apr. 2001, pp. 76-82.
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